把SYSTEM MONITOR挪到AP的时钟中断外执行

diff --git a/include/apic.h b/include/apic.h
index 29550948772197ecc38b3992c67718e925b4bd04..fcc856356b704ceaeca9bf934c5df78948904c37 100644 (file)
--- a/include/apic.h
+++ b/include/apic.h
@@ -201,37 +201,3 @@ typedef union ioapic_rte ioapic_rte_t;
 
 uint64_t ioapic_rte_read(uint32_t index);
 void ioapic_rte_write(uint32_t index, uint64_t v);
-
-union hpet_timn_conf_cap {
-    uint64_t value;
-    struct {
-        // BYTE 1
-        uint64_t reserved0 : 1;     // bit0
-        uint64_t trigger_mode : 1;  // bit1
-        uint64_t enable_int : 1;    // bit2
-        uint64_t type : 1;          // bit3
-        uint64_t periodic : 1;      // bit4 read only
-        uint64_t bit_size : 1;      // bit5 read only 0 32位位宽 1 64位位宽
-        uint64_t val_set : 1;       // bit6 标志位只对处于周期定时模式下的定时器0起作⽤
-                                    // 置位此标志位可使软件在定时器运⾏时直接修改定时值。
-        //  bit7
-        uint64_t reserved1 : 1;
-
-        // >>> bin(0x174C)
-        //  '0b1 0111 0100 1100'
-        // >>> bin(0x2E7C)
-        // '0b10 1110 0111 1100'
-        // BYTE 2
-        uint64_t counter_bit_size : 1;
-        uint64_t int_route : 5;
-        uint64_t fsb_en : 1;
-        uint64_t fsb_delivery_status : 1;  // 15 read only
-
-        // BYTE 3~4
-        uint64_t reserved2 : 16;
-
-        // BYTE 5~8
-        uint64_t int_route_cap : 32;  // read only
-    };
-} PACKED;
-typedef union hpet_timn_conf_cap hpet_timn_conf_cap_t;

diff --git a/kernel/ap.c b/kernel/ap.c
index cf6ca44247f0dcdbea41576ee84d408d64d77cda..617ba76db90b40c9468d8b4313d98e4155c9329a 100644 (file)
--- a/kernel/ap.c
+++ b/kernel/ap.c
@@ -225,9 +225,8 @@ void ap_kernel_entry() {
     const char* title = "KERNEL MONITOR";
     printlxy(MPL_TITLE, (80 - strlen(title)) / 2, title);
 
-    while (1) {
-        asm("hlt;");
-    }
+    void system_monitor();
+    system_monitor();
 }
 
 bool ap_ready() {
@@ -253,6 +252,12 @@ void do_ap_lapic_irq_handler() {
     uint8_t* p = (uint8_t*)0xC00B8002;
     *p = *p == ' ' ? 'E' : ' ';
 
+    ap_lapic_ticks++;
+
+    system.lapic->write(LAPIC_EOI, 0);
+}
+
+void _system_monitor() {
     //
     extern volatile uint64_t jiffies;
     extern volatile uint64_t hpet_ticks;  // jiffies 和 hpet_ticks 是同一个东西
@@ -273,10 +278,17 @@ void do_ap_lapic_irq_handler() {
     //
     // void print_all_ides();
     // print_all_ides();
-
-    ap_lapic_ticks++;
-
-    system.lapic->write(LAPIC_EOI, 0);
+}
+void system_monitor() {
+    while (1) {
+        asm("hlt");
+        uint64_t ap_monitor_begin = ap_lapic_ticks;
+        _system_monitor();
+        uint64_t ap_monitor_end = ap_lapic_ticks;
+        if (ap_monitor_end != ap_monitor_begin) {
+            // panic("AP monitor cost too long\n");
+        }
+    }
 }
 
 #include <task.h>

diff --git a/kernel/apic.c b/kernel/apic.c
index f0ec9559ba856f2bff0f30a8e68b1978ae65b83f..f23ee7f552208e13f0848bb0167268bb23483a26 100644 (file)
--- a/kernel/apic.c
+++ b/kernel/apic.c
@@ -312,16 +312,28 @@ void ioapic_init() {
 
     extern irq_chip_t ioapic_chip;
 #if 1
+    ioapic_rte_t rte;
 
-    // 8253/8254连在i8259的0号引脚，但连在IO APIC的2号引脚上
-    // 把8253/8254的中断通过IOAPIC转发到CPU0的0号中断
-    // ioapic_rte_write(IOAPIC_RTE(2), 0x20 + 0 | (dst_cpuid << 56));
+    // 8253/8254连在8259的0号引脚，但8259连在IO APIC的2号引脚上
     // 把8253/8254的中断通过IOAPIC转发到CPU1的0号中断
-    ioapic_rte_write(IOAPIC_RTE(2), 0x20 + 0 | (1ULL << 56));
-    ioapic_rte_write(IOAPIC_RTE(2), 0x20 + 0 | (1ULL << 56) | 0x10000);
+    rte.value = 0;
+    rte.vector = 0x20 + 0;
+    rte.delivery_mode = IOAPIC_DELIVERY_MODE_FIXED;
+    rte.destination_mode = IOAPIC_PHYSICAL_DESTINATION;
+    rte.trigger_mode = IOAPIC_TRIGGER_MODE_EDGE;
+    rte.mask = IOAPIC_INT_MASKED;  // 暂时先屏蔽
+    rte.destination = 1;
+    ioapic_rte_write(IOAPIC_RTE(2), rte.value);
+
     // 把键盘中断通过IOAPIC转发到CPU0的1号中断
-    ioapic_rte_write(IOAPIC_RTE(1), 0x20 + 1 | (dst_cpuid << 56));
-    // irq_set_chip(0x00, &ioapic_chip);  // ap不需要这个
+    rte.value = 0;
+    rte.vector = 0x20 + 1;
+    rte.delivery_mode = IOAPIC_DELIVERY_MODE_FIXED;
+    rte.destination_mode = IOAPIC_PHYSICAL_DESTINATION;
+    rte.trigger_mode = IOAPIC_TRIGGER_MODE_EDGE;
+    rte.mask = IOAPIC_INT_UNMASKED;
+    rte.destination = 0;
+    ioapic_rte_write(IOAPIC_RTE(1), rte.value);
     irq_set_chip(0x01, &ioapic_chip);
 #endif
 }